Files
TERMINAL
Coverage ×
FSiMX Wave
Run a simulation with VCD dump enabled, then view waveforms here.
Design. Simulate. Verify.
All WIOWIZ EDA tools. One cloud platform. Nothing to install.
SoC Verify
Upload your SoC RTL — lint, CDC/RDC, simulation and power-aware lanes run in parallel. Every verdict links to the engine's raw, unfiltered log.
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(.sv/.v sources · optional .f filelist · optional .upf power intent)
Help & Support
Everything runs on our servers in your private workspace — nothing is installed on, or read from, your computer.
Getting started
New here? Take the 10-minute guided FSiMX example: run a simulation, read a failure, fix the RTL.
Open guided examples →
The terminal
Your workspace is a real Linux shell. Files persist between visits.
Open terminal →
fsxrun is on PATH; run any example with ./run.sh.About
WIOWIZ — cloud EDA platform.
Engine: FSiMX (beta).
Engine: FSiMX (beta).
examples
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▸ terminal — private workspace
~/examples
⟳ reconnect
Guided Labs
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▸ lab terminal — private workspace
⟳ reconnect
Run a simulation to generate coverage analysis.
Coverage runs automatically when you run a simulation.
Coverage runs automatically when you run a simulation.
Truti — CDC / RDC Signoff
Structural clock- and reset-domain-crossing analysis. Upload RTL or try the sample design.
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vWIZ-Formal — Property Proofs
Model-check safety invariants. PROVEN = holds for all reachable states; CEX = a counterexample trace was found.
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vWIZ-LP — UPF Power-Aware Signoff
Power intent (domains, isolation, retention) + a power-aware simulation that powers a domain down and back up.
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Bus Architecture
CPU — Select One
IP Blocks — Click to Add
Configuration